Semiconductor devices are used in many electronic and other applications. Semiconductor devices comprise integrated circuits that are formed on semiconductor wafers by depositing many types of thin films of material over the semiconductor wafers, and patterning the thin films of material to form the integrated circuits.
There is a trend in the semiconductor industry towards reducing the size of features, e.g., the circuits, elements, conductive lines, and vias of semiconductor devices, in order to increase performance of the semiconductor devices, minimize current leakage and reduce power consumption, for example. The minimum feature size of semiconductor devices has steadily decreased over time. However, as features of semiconductor devices become smaller, it becomes more difficult to pattern the various material layers because of diffraction and other effects that occur during a lithography process. For example, key metrics such as resolution and depth of focus of the imaging systems may suffer when patterning features at small dimensions. One such challenge involves the contact formation in the front-end-of-line that includes silicidation of active area and forming contacts to it through an insulating layer. Scaling challenges these processes by decreasing the contact sizes as well as the contact to contact spacing. Increasingly silicidation introduces defects that significantly reduce process yields.
Innovative process solutions have been developed that overcome some of these limitations. However, many such process solutions also interact with subsequent steps and may degrade other equally important factors.
Thus, what are needed in the art are structures and methods of forming semiconductor devices that minimize process complexity and costs but enable continued scaling.